CPU clock divider:
==================

The CPU clock divider is an 8bit register, which is writeable by software
running on the DIY Calculator CPU. To achieve a wider range of frequency
settings a non-linear scheme (similar to A-Law/u-Law PCM enconding) is
utilized. The 8bit byte is divided into two 4bit chunks: the high four
bits act as a segment descriptor, whereas the low 4bit act as index inside
the segment. Additionally bits are shifted left dependant on the segment
number. Here is the final encoding table ("xxxx" denote the low 4 bits
of the divider byte):

  segment |  resulting 24bit divider value
  ---------------------------------------
     0    |  0000 0000 0000 0000 000x xxx0
     1    |  0000 0000 0000 0000 001x xxx0
     2    |  0000 0000 0000 0000 010x xxx0
     3    |  0000 0000 0000 0000 100x xxx0
     4    |  0000 0000 0000 0010 000x xxx0
     5    |  0000 0000 0000 0100 00xx xx00
     6    |  0000 0000 0001 0000 00xx xx00
     7    |  0000 0000 0010 0000 00xx xx00
     8    |  0000 0000 0100 0000 0xxx x000
     9    |  0000 0001 0000 0000 0xxx x000
    10    |  0000 0010 0000 0000 0xxx x000
    11    |  0000 0100 0000 0000 xxxx 0000
    12    |  0001 0000 0000 0000 xxxx 0000
    13    |  0010 0000 0000 0000 xxxx 0000
    14    |  0100 0000 0000 000x xxx0 0000
    15    |  1000 0000 0000 000x xxx0 0000

For the given 25MHz input clock this gives a frequency range from ca. 3Hz
up to 12.5MHz.
The CPU divider port is located at $F036 in the DIY Calculator I/O address
space.
Note that you cannot write a value of 0 or 1 to the divider. This will be
mapped to 2 by the hardware.