DIY-Calculator Hardware:Hardware Project

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[[Image:Blockdiagram.jpg|thumb|left|Blockdiagram]] [[Image:Blockdiagram.jpg|thumb|left|Blockdiagram]]
-The layout will somewhat resemble the layout of the (virtual) DIY Calculator with an 20x1 character LC display and a 70 keys sensor key matrix. Additionally there are connectivity means for a host PC:+The layout will somewhat resemble the layout of the (virtual) DIY Calculator with an 20x2 character LC display and a 73 keys sensor key matrix. Additionally there are connectivity means for a host PC:
* Serial (RS-232) for uploading user programs and providing a console to the DIY Calculator CPU * Serial (RS-232) for uploading user programs and providing a console to the DIY Calculator CPU
* A JTAG programming connector; this connects to the PC's parallel port and enables the user to load new designs into the FPGA * A JTAG programming connector; this connects to the PC's parallel port and enables the user to load new designs into the FPGA
-<br style="clear:left;"> 
<br style="clear:left;"> <br style="clear:left;">
Line 12: Line 11:
<div style="background:#f9f9f9; padding:0; border:1px solid #aaaaaa; margin-bottom:15px;"> <div style="background:#f9f9f9; padding:0; border:1px solid #aaaaaa; margin-bottom:15px;">
<div style="background:#eeeeee; padding:0 0.4em 0 0.4em; border-bottom:1px solid #aaaaaa;"> <div style="background:#eeeeee; padding:0 0.4em 0 0.4em; border-bottom:1px solid #aaaaaa;">
-'''Project status'''&nbsp;(9.Oct.2006):+'''Project status'''&nbsp;(Apr, 2nd 2007):
 +</div>
 +<div style="padding:0.2em 0.4em 0.2em 0.4em;">
 +Assembled prototypes (2nd version) arrived.
 +[[Image:serial2.jpg|thumb|left|DIY Calculator - up and running]]
 +'''This time just good news!'''
 + 
 +Out of the box, all pieces plugged together, power applied and firmware loaded. Everything works - as there would be just this possibility.
 +Sometimes miracles happen :-)
 +<br style="clear:left;" />
 +</div>
 +</div>
 + 
 +<div style="background:#f9f9f9; padding:0px; border:1px solid #aaaaaa; margin-bottom:15px;">
 +<div style="background:#eeeeee; padding:0 0.4em 0 0.4em; border-bottom:1px solid #aaaaaa;">
 +'''Project status'''&nbsp;(Dec, 14th 2006):
 +</div>
 +<div style="padding:0.2em 0.4em 0.2em 0.4em;">
 +New prototype boards arrived...
 + 
 +[[Image:aq0181.jpg|thumb|left|FPGA board]] [[Image:aq0191.jpg|thumb|left|Keypad]]
 +<br style="clear:left;" />
 +</div>
 +</div>
 + 
 +<div style="background:#f9f9f9; padding:0; border:1px solid #aaaaaa; margin-bottom:15px;">
 +<div style="background:#eeeeee; padding:0 0.4em 0 0.4em; border-bottom:1px solid #aaaaaa;">
 +'''Project status'''&nbsp;(Nov, 28th 2006):
 +</div>
 +<div style="padding:0.2em 0.4em 0.2em 0.4em;">
 +A new cycle of prototyping started.
 + 
 +After very careful inspection of first prototypes, at least as far this was possible, all layout changes are made for the new prototyping cycle - hopefully this time we'll have more luck...
 +<br style="clear:left;" />
 + 
 +Schematics:
 +* [[:Media:aq0181_diycalculator_fpga_schematics_1.pdf|FPGA Board Schematics]]
 +Layout:
 +* [[:Media:aq0181_diycalculator_fpga_artwork_1.pdf|FPGA Board Layout]]
 +</div>
 +</div>
 + 
 +<div style="background:#f9f9f9; padding:0; border:1px solid #aaaaaa; margin-bottom:15px;">
 +<div style="background:#eeeeee; padding:0 0.4em 0 0.4em; border-bottom:1px solid #aaaaaa;">
 +'''Project status'''&nbsp;(Nov, 24th 2006):
 +</div>
 +<div style="padding:0.2em 0.4em 0.2em 0.4em;">
 +Assembled FPGA board (very first version) finally arrived.
 +[[Image:FPGA_V0_1.jpg|thumb|left|populated FPGA Board]]
 +Good and bad news...
 + 
 +'''Good news first:'''
 +We've got the board finally - almost everything works as supposed.
 + 
 +'''Now the bad news:'''
 +FPGA does not work!
 +I've made two mistakes - T1 (in JTAG chain) has drain and source the wrong
 +way around - this is not really bad because I can fix it just for these
 +three samples.
 +But the second one is quite fatal - VCCAUX on FPGA should be wired to 3.3V instead of
 +1.2V. As those voltages are on inner layers and under the BGA, there is no
 +way to get this fixed. I could manage to disconnect it from 1.2V but FPGA
 +doesn't start configuration when one of the voltages is out of specs.
 +<br style="clear:left;" />
 +Anyway, attached picture looks nice - I'll put down my "Picasso" at home and
 +hang this up instead - it's almost as expensive :-)
 +</div>
 +</div>
 + 
 +<div style="background:#f9f9f9; padding:0; border:1px solid #aaaaaa; margin-bottom:15px;">
 +<div style="background:#eeeeee; padding:0 0.4em 0 0.4em; border-bottom:1px solid #aaaaaa;">
 +'''Project status'''&nbsp;(Nov, 16th 2006):
 +</div>
 +<div style="padding:0.2em 0.4em 0.2em 0.4em;">
 +Work on FPGA Board revision is finished.
 +[[Image:aq0181_diy_calculator_fpga.JPG|thumb|left|FPGA Board screenshot]]
 +Schematics:
 +* [[:Media:aq0181_diycalculator_fpga_schematics.pdf|FPGA Board Schematics]]
 +Layout:
 +* [[:Media:aq0181_diycalculator_fpga_artwork.pdf|FPGA Board Layout]]
 +<br style="clear:left;" />
 +Thanks to Johannes' genious [http://www.opencores.org/projects.cgi/web/spiflashcontroller "SPI flashcontroller"], userdata can be permanently stored in the sparespace of FPGA's Serial Flash. This obsoletes all the PROM/RAM socket stuff. A 128kx8 SRAM has been added instead. At boottime, userdata is restored from SPI to RAM and the Monitor starts execution. Nowadays, 128kx8 SRAM's are the smallest available. This is actually twice as much the DIY CPU can address. Therefore an extra address line (A16) is added and can be used for future expansion.
 +</div>
 +</div>
 + 
 +<div style="background:#f9f9f9; padding:0; border:1px solid #aaaaaa; margin-bottom:15px;">
 +<div style="background:#eeeeee; padding:0 0.4em 0 0.4em; border-bottom:1px solid #aaaaaa;">
 +'''Project status'''&nbsp;(Nov, 15th 2006):
 +</div>
 +<div style="padding:0.2em 0.4em 0.2em 0.4em;">
 +Work on keypad revision is finished.
 +[[Image:aq0191_diy_calculator_keypad.JPG|thumb|left|Keypad screenshot]]
 +Schematics:
 +* [[:Media:aq0191_diycalculator_keypad_schematics.pdf|Keypad_Schematics]]
 +Layout:
 +* [[:Media:aq0191_diycalculator_keypad_artwork.pdf|Keypad_Layout]]
 +<br style="clear:left;" />
 +After successful tests with prototype, we now changed throughhole components to SMT. Silkprint was added and 16 spare signals from FPGA board are now tied to testpoints, for better usability as a generic FPGA prototyping environment. Circuitry for switching LCD backlight was added (see new schematics).
 + 
 +Due to very poor availibility of the previously planned LCD Display, we decided to choose a "more common" 2x20 type. This display is manufactured by a lot of different vendors. Later, the LCD controller inside the FPGA, will be extended to adress the extra line - most probably a new I/O port for the CPU will be assigned for this purpose, to maintain compatibility to the Virtual DIY Calculator.
 + 
 +Redesign of FPGA board is in progress...
 +</div>
 +</div>
 + 
 +<div style="background:#f9f9f9; padding:0; border:1px solid #aaaaaa; margin-bottom:15px;">
 +<div style="background:#eeeeee; padding:0 0.4em 0 0.4em; border-bottom:1px solid #aaaaaa;">
 +'''Project status'''&nbsp;(Nov, 11th 2006):
 +</div>
 +<div style="padding:0.2em 0.4em 0.2em 0.4em;">
 +During the past weeks a lot of things happened at the software side (see [[DIY-Calculator_Hardware:Upload_Utility_Project|Upload_Utility_Project]]). This happened just in time, since we expect the first pieces of the '''real''' DIY Calculator hardware for next week. So stay tuned, this section will soon have great news and exciting pictures!
 +</div>
 +</div>
 + 
 +<div style="background:#f9f9f9; padding:0; border:1px solid #aaaaaa; margin-bottom:15px;">
 +<div style="background:#eeeeee; padding:0 0.4em 0 0.4em; border-bottom:1px solid #aaaaaa;">
 +'''Project status'''&nbsp;(Oct, 9th 2006):
</div> </div>
<div style="padding:0.2em 0.4em 0.2em 0.4em;"> <div style="padding:0.2em 0.4em 0.2em 0.4em;">
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<div style="background:#f9f9f9; padding:0px; border:1px solid #aaaaaa; margin-bottom:15px;"> <div style="background:#f9f9f9; padding:0px; border:1px solid #aaaaaa; margin-bottom:15px;">
<div style="background:#eeeeee; padding:0 0.4em 0 0.4em; border-bottom:1px solid #aaaaaa;"> <div style="background:#eeeeee; padding:0 0.4em 0 0.4em; border-bottom:1px solid #aaaaaa;">
-'''Project status'''&nbsp;(31.Aug.2006):+'''Project status'''&nbsp;(Aug, 31st 2006):
</div> </div>
<div style="padding:0.2em 0.4em 0.2em 0.4em;"> <div style="padding:0.2em 0.4em 0.2em 0.4em;">
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<div style="background:#f9f9f9; padding:0px; border:1px solid #aaaaaa; margin-bottom:15px;"> <div style="background:#f9f9f9; padding:0px; border:1px solid #aaaaaa; margin-bottom:15px;">
<div style="background:#eeeeee; padding:0 0.4em 0 0.4em; border-bottom:1px solid #aaaaaa;"> <div style="background:#eeeeee; padding:0 0.4em 0 0.4em; border-bottom:1px solid #aaaaaa;">
-'''Project status'''&nbsp;(13.Aug.2006):+'''Project status'''&nbsp;(Aug, 13th 2006):
</div> </div>
<div style="padding:0.2em 0.4em 0.2em 0.4em;"> <div style="padding:0.2em 0.4em 0.2em 0.4em;">
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<div style="background:#f9f9f9; padding:0px; border:1px solid #aaaaaa; margin-bottom:15px;"> <div style="background:#f9f9f9; padding:0px; border:1px solid #aaaaaa; margin-bottom:15px;">
<div style="background:#eeeeee; padding:0 0.4em 0 0.4em; border-bottom:1px solid #aaaaaa;"> <div style="background:#eeeeee; padding:0 0.4em 0 0.4em; border-bottom:1px solid #aaaaaa;">
-'''Project status'''&nbsp;(7.Aug.2006):+'''Project status'''&nbsp;(Aug, 7th 2006):
</div> </div>
<div style="padding:0.2em 0.4em 0.2em 0.4em;"> <div style="padding:0.2em 0.4em 0.2em 0.4em;">
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<div style="background:#f9f9f9; padding:0px; border:1px solid #aaaaaa; margin-bottom:15px;"> <div style="background:#f9f9f9; padding:0px; border:1px solid #aaaaaa; margin-bottom:15px;">
<div style="background:#eeeeee; padding:0 0.4em 0 0.4em; border-bottom:1px solid #aaaaaa;"> <div style="background:#eeeeee; padding:0 0.4em 0 0.4em; border-bottom:1px solid #aaaaaa;">
-'''Project status'''&nbsp;(19.Jul.2006):+'''Project status'''&nbsp;(Jul, 19th 2006):
</div> </div>
<div style="padding:0.2em 0.4em 0.2em 0.4em;"> <div style="padding:0.2em 0.4em 0.2em 0.4em;">
Line 72: Line 187:
</div> </div>
</div> </div>
 +
</div> </div>

Current revision

Blockdiagram
Enlarge
Blockdiagram

The layout will somewhat resemble the layout of the (virtual) DIY Calculator with an 20x2 character LC display and a 73 keys sensor key matrix. Additionally there are connectivity means for a host PC:

  • Serial (RS-232) for uploading user programs and providing a console to the DIY Calculator CPU
  • A JTAG programming connector; this connects to the PC's parallel port and enables the user to load new designs into the FPGA



Project status (Apr, 2nd 2007):

Assembled prototypes (2nd version) arrived.

DIY Calculator - up and running
Enlarge
DIY Calculator - up and running

This time just good news!

Out of the box, all pieces plugged together, power applied and firmware loaded. Everything works - as there would be just this possibility. Sometimes miracles happen :-)

Project status (Dec, 14th 2006):

New prototype boards arrived...

FPGA board
Enlarge
FPGA board
Keypad
Enlarge
Keypad


Project status (Nov, 28th 2006):

A new cycle of prototyping started.

After very careful inspection of first prototypes, at least as far this was possible, all layout changes are made for the new prototyping cycle - hopefully this time we'll have more luck...

Schematics:

Layout:

Project status (Nov, 24th 2006):

Assembled FPGA board (very first version) finally arrived.

populated FPGA Board
Enlarge
populated FPGA Board

Good and bad news...

Good news first: We've got the board finally - almost everything works as supposed.

Now the bad news: FPGA does not work! I've made two mistakes - T1 (in JTAG chain) has drain and source the wrong way around - this is not really bad because I can fix it just for these three samples. But the second one is quite fatal - VCCAUX on FPGA should be wired to 3.3V instead of 1.2V. As those voltages are on inner layers and under the BGA, there is no way to get this fixed. I could manage to disconnect it from 1.2V but FPGA doesn't start configuration when one of the voltages is out of specs.
Anyway, attached picture looks nice - I'll put down my "Picasso" at home and hang this up instead - it's almost as expensive :-)

Project status (Nov, 16th 2006):

Work on FPGA Board revision is finished.

FPGA Board screenshot
Enlarge
FPGA Board screenshot

Schematics:

Layout:


Thanks to Johannes' genious "SPI flashcontroller", userdata can be permanently stored in the sparespace of FPGA's Serial Flash. This obsoletes all the PROM/RAM socket stuff. A 128kx8 SRAM has been added instead. At boottime, userdata is restored from SPI to RAM and the Monitor starts execution. Nowadays, 128kx8 SRAM's are the smallest available. This is actually twice as much the DIY CPU can address. Therefore an extra address line (A16) is added and can be used for future expansion.

Project status (Nov, 15th 2006):

Work on keypad revision is finished.

Keypad screenshot
Enlarge
Keypad screenshot

Schematics:

Layout:


After successful tests with prototype, we now changed throughhole components to SMT. Silkprint was added and 16 spare signals from FPGA board are now tied to testpoints, for better usability as a generic FPGA prototyping environment. Circuitry for switching LCD backlight was added (see new schematics).

Due to very poor availibility of the previously planned LCD Display, we decided to choose a "more common" 2x20 type. This display is manufactured by a lot of different vendors. Later, the LCD controller inside the FPGA, will be extended to adress the extra line - most probably a new I/O port for the CPU will be assigned for this purpose, to maintain compatibility to the Virtual DIY Calculator.

Redesign of FPGA board is in progress...

Project status (Nov, 11th 2006):

During the past weeks a lot of things happened at the software side (see Upload_Utility_Project). This happened just in time, since we expect the first pieces of the real DIY Calculator hardware for next week. So stay tuned, this section will soon have great news and exciting pictures!

Project status (Oct, 9th 2006):

New LCD module tested and integrated. The originally planned 20x1 LCD module is hard to get, so we evaluated additionally 20x2 types (this mainly has impact on the mechanical hardware design).

Project status (Aug, 31st 2006):

Testing sensor pads
Enlarge
Testing sensor pads
~3uS skew
Enlarge
~3uS skew


Test of sensor keypad was successful. Here are the photos

Project status (Aug, 13th 2006):

Prototype PCB layout completed. Here are the "final" schematics:

keypad mechanics:

and the layout:

Bare FPGA Board
Enlarge
Bare FPGA Board
Keypad prototype
Enlarge
Keypad prototype


Test of sensor keypad is in progress.

Project status (Aug, 7th 2006):

We decided to separate the functionality into two PCBs: the FPGA with surrounding components and the sensor keypad. This gives even more flexibility for different I/O modules. Here are the updated schematics:

Project status (Jul, 19th 2006):

schematics completed, PCB layout work started

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